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ATmega128
Note:
1. For all fuses “1” means unprogrammed while “0” means programmed.
The various choices for each clocking option is given in the following sections. W hen the CPU
wakes up from Power-down or Power-save, the selected clock source is used to time the start-
up, ensuring stable Oscillator operation before instruction execution starts. W hen the CPU starts
from reset, there is as an additional delay allowing the power to reach a stable level before com-
mencing normal operation. The W atchdog Oscillator is used for timing this real-time part of the
start-up time. The number of W DT Oscillator cycles used for each time-out is shown in Table 7 .
The frequency of the W atchdog Oscillator is voltage dependent as shown in the “Typical Char-
acteristics” on page 333 .
Table 7. Number of W atchdog Oscillator Cycles
Typical Time-out (V CC = 5.0V)
4.1ms
65ms
Typical Time-Out (V CC = 3.0V)
4.3ms
69ms
Number of Cycles
4K (4,096)
64K (65,536)
Default Clock
Source
The device is shipped with CKSEL = “0001” and SUT = “10”. The default clock source setting is
therefore the Internal RC Oscillator with longest startup time. This default setting ensures that all
users can make their desired clock source setting using an In-System or Parallel Programmer.
37
2467X–AVR–06/11
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